dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 208

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

addresses of the last five instructions that were executed.
10.8.1 PAB Register for Fetch (OPABFR)
The OPABFR is a 16-bit register that stores the address of the last instruction that was
fetched before the debug mode was entered. The OPABFR can only be read through the
OnCE serial interface. This register is not affected by the operations performed during the
debug mode.
10.8.2 PAB Register for Decode (OPABDR)
The OPABDR is a 16-bit register that stores the address of the instruction currently in the
instruction latch. This is the instruction that would have been decoded if the chip would
not have entered the debug mode. OPABDR can only be read through the serial interface.
MOTOROLA
PROGRAM ADDRESS BUS HISTORY BUFFER
DECODE ADDRESS (OPABDR)
FETCH ADDRESS (OPABFR)
PAB FIFO SHIFT REGISTER
Freescale Semiconductor, Inc.
PAB FIFO REGISTER 1
PAB FIFO REGISTER 0
PAB FIFO REGISTER 2
PAB FIFO REGISTER 3
PAB FIFO REGISTER 4
For More Information On This Product,
Figure 10-9 OnCE PAB FIFO
ON-CHIP EMULATION (OnCE)
Go to: www.freescale.com
PAB
DSCK
DSO
CIRCULAR
POINTER
BUFFER
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