dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 512
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dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 512 of 637
- Download datasheet (4Mb)
Operation:
Description: Logically OR the 8-bit immediate operand (#xx) with the contents of the
destination control register D and store the result in the destination control register. The
condition codes are affected only when the condition code register is specified as the
destination operand.
Restrictions: The ORI #xx,MR instruction cannot be used immediately before an
ENDDO or RTI instruction and cannot be one of the last three instructions in a DO loop
(at LA–2, LA–1, or LA).
Example:
Explanation of Example: Prior to execution, the 8-bit mode register (MR) contains the
value $03. The OR #$8,MR instruction logically ORs the immediate 8-bit value $8 with
the contents of the mode register and stores the result in the mode register.
Condition Codes:
For CCR operand:
S — Set if bit 7 of the immediate operand is set
L — Set if bit 6 of the immediate operand is set
E — Set if bit 5 of the immediate operand is set
U — Set if bit 4 of the immediate operand is set
N — Set if bit 3 of the immediate operand is set
Z — Set if bit 2 of the immediate operand is set
V — Set if bit 1 of the immediate operand is set
C — Set if bit 0 of the immediate operand is set
A - 246
ORI
#xx+D
where + denotes the logical inclusive OR operator
OR #$8,MR
MR
LF
1
5
:
:
D
DM
14
Before Execution
13
T
Freescale Semiconductor, Inc.
**
12
$03
For More Information On This Product,
OR Immediate with Control Register
MR
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
S0
10
Go to: www.freescale.com
I1
9
;set scaling mode bit S1 to scale up
I0
8
S
7
MR
Assembler Syntax:
L
6
E
5
OR(I)
After Execution
U
4
CCR
$0B
N
3
#xx,D
Z
2
V
1
C
0
MOTOROLA
ORI
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