dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 556
![no-image](/images/manufacturer_photos/0/2/263/freescale_semiconductor__inc_sml.jpg)
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 556 of 637
- Download datasheet (4Mb)
Operation:
Description: Compare the specified source accumulator S with zero and set the condi-
tion codes accordingly. No result is stored although the condition codes are updated.
Example:
Explanation of Example: Prior to execution, the 56-bit A accumulator contains the
value $01:020304:000000, and the 16-bit condition code register contains the value
$0300. The execution of the TST A instruction compares the value in the A register with
zero and updates the condition code register accordingly. The contents of the A accumu-
lator are not affected.
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move
E — Set if the signed integer portion of A or B result is in use
U — Set if A or B result is unnormalized
N — Set if bit 55 of A or B result is set
Z — Set if A or B result equals zero
V — Always cleared
Note: The definitions of the E and U bits vary according to the scaling mode being used.
Refer to Section A.5 CONDITION CODE COMPUTATION for complete details.
A - 290
TST
S–0 (parallel move)
TST A
CCR
A
LF
1
5
:
:
DM
14
#$345678,B
$01:020304:000000
Before Execution
13
T
Freescale Semiconductor, Inc.
**
12
For More Information On This Product,
MR
INSTRUCTION DESCRIPTIONS
$0300
S1
11
INSTRUCTION SET DETAILS
S0
10
Go to: www.freescale.com
Test Accumulator
I1
;set CCR bits for value in A, update B
9
I0
8
S
7
CCR
Assembler Syntax:
A
L
6
TST
E
5
$01:020304:000000
U
4
After Execution
S (parallel move)
CCR
N
3
$0330
Z
2
V
1
C
0
MOTOROLA
TST
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