dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 372
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 372 of 637
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Operation:
Description: Jump to the location in program memory given by the instruction’s effective
address if the specified condition is true. If the specified condition is false, the program
counter (PC) is incremented and the effective address is ignored. However, the address
register specified in the effective address field is always updated independently of the
specified condition. All memory alterable addressing modes may be used for the effec-
tive address. A Fast Short Jump addressing mode may also be used. The 12-bit data is
zero extended to form the effective address. See Section A.9 for restrictions. The term
“cc” may specify the following conditions:
where
U denotes the logical complement of U,
A - 106
Jcc
denotes the logical AND operator, and
denotes the logical OR operator,
denotes the logical Exclusive OR operator
CC (HS)
CS (LO)
EC
EQ
ES
GE
GT
LC
LE
LS
LT
MI
NE
NR
PL
NN
If cc, then 0xxx
If cc, then ea
else PC+1
else PC+1
— carry clear (higher or same)
— carry set (lower)
— extension clear
— equal
— extension set
— greater than or equal
— greater than
— limit clear
— less than or equal
— limit set
— less than
— minus
— not equal
— normalized
— plus
— not normalized
PC
“cc” Mnemonic
PC
Freescale Semiconductor, Inc.
PC
PC
For More Information On This Product,
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Go to: www.freescale.com
Jump Conditionally
Assembler Syntax:
Jcc xxx
Jcc xxx
Condition
C=0
C=1
E=0
Z=1
E=1
N
Z+(N
L=0
Z+(N
L=1
N
N=1
Z=0
Z+(U E)=1
N=0
Z+(U E)=0
V=0
V=1
V)=0
V)=1
MOTOROLA
Jcc
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