adc12d800rfrb National Semiconductor Corporation, adc12d800rfrb Datasheet - Page 27

• Manufacturer Part Number: adc12d800rfrb
• Description: 12-bit, 1.6/1.0 Gsps Rf Sampling Adc
• Manufacturer: National Semiconductor Corporation

Note 12: The Dynamic Specifications are guaranteed for room to hot ambient temperature only (25°C to 85°C). Refer to the plots of the dynamic performance
vs. temperature in the Typical Performance Plots to see typical performance from cold to room temperature (-40°C to 25°C).
Note 13: These measurements were taken in Extended Control Mode (ECM) with the DES Timing Adjust feature enabled (Addr: 7h). This feature is used to
reduce the interleaving timing spur amplitude, which occurs at Fs/2-Fin, and thereby increase the SFDR, SINAD and ENOB.
Note 14: The Fs/2 spur was removed from all the dynamic performance spectifications.
Note 15: Proper common mode voltage must be maintained to ensure proper output codes, especially during input overdrive.
Note 16: The -3dB point is the traditional Full-Power Bandwidth (FPBW) specification. Although the insertion loss is approximately half at this frequency, the
dynamic performance of the ADC does not necessarily begin to degrade to a level below which it may be effectively used in an application. The ADC may be
used at input frequencies above the -3dB FPBW point, for example, into the 5th and 6th Nyquist zones. Depending on system requirements, it is only necessary
to compensate for the insertion loss.
Note 17: This feature functionality is not tested in production test; performance is tested in the specified/default mode only.
Note 18: This pin/bit functionality is not tested in production test; performance is tested in the specified/default mode only.
Note 19: Typical dynamic performance at Fin = 248 MHz, 498 MHz, 998 MHz, and 1498 MHz is guaranteed by design and/or characterization and is not tested
in production.
27
www.national.com