adc12d800rfrb National Semiconductor Corporation, adc12d800rfrb Datasheet - Page 12
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adc12d800rfrb
Manufacturer Part Number
adc12d800rfrb
Description
12-bit, 1.6/1.0 Gsps Rf Sampling Adc
Manufacturer
National Semiconductor Corporation
Datasheet
1.ADC12D800RFRB.pdf
(62 pages)
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D1, D7, E3, F4,
Ball No.
W3, U7
B3
C4
C5
B4
A3
C7
Name
SCLK
SDO
DNC
ECE
SCS
SDI
NC
Equivalent Circuit
NONE
NONE
12
Description
Extended Control Enable bar. Extended feature
control through the SPI interface is enabled when
this signal is asserted (logic-low). In this case,
most of the direct control pins have no effect.
When this signal is de-asserted (logic-high), the
SPI interface is disabled, all SPI registers are
reset to their default values, and all available
settings are controlled via the control pins.
Serial Chip Select bar. In ECM, when this signal
is asserted (logic-low), SCLK is used to clock in
serial data which is present on SDI and to source
serial data on SDO. When this signal is de-
asserted (logic-high), SDI is ignored and SDO is
in tri-stated.
Serial Clock. In ECM, serial data is shifted into
and out of the device synchronously to this clock
signal. This clock may be disabled and held logic-
low, as long as timing specifications are not
violated when the clock is enabled or disabled.
Serial Data-In. In ECM, serial data is shifted into
the device on this pin while SCS signal is
asserted (logic-low).
Serial Data-Out. In ECM, serial data is shifted out
of the device on this pin while SCS signal is
asserted (logic-low). This output is tri-stated
when SCS is de-asserted.
Do Not Connect. These pins are used for internal
purposes and should not be connected, i.e. left
floating. Do not ground.
Not Connected. This pin is not bonded and may
be left floating or connected to any potential.
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