adc1213d125hn/c1 NXP Semiconductors, adc1213d125hn/c1 Datasheet - Page 32

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adc1213d125hn/c1

Manufacturer Part Number
adc1213d125hn/c1
Description
Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
ADC1213D_SER_5
Preliminary data sheet
Bit
7 to 2
1 to 0
Bit
7 to 0
Bit
7 to 4
3 to 0
Bit
7
6 to 1
0
Bit
7 to 3
2 to 0
Bit
7 to 5
4 to 0
Bit
7 to 1
0
Symbol
-
PRBS_TYPE[1:0]
Symbol
DID[7:0]
Symbol
-
BID[3:0]
Symbol
SCR
-
L
Symbol
-
F[2:0]
Symbol
-
K[4:0]
Symbol
-
M
SER PRBS Ctrl (address 080Bh)
Cfg_0_DID (address 0820h)
Cfg_1_BID (address 0821h)
Cfg_3_SCR_L (address 0822h)
Cfg_4_F (address 0823h)
Cfg_5_K (address 0824h)
Cfg_6_M (address 0825h)
R
R/W
R/W
R
R
Access
Access
R
Access
R
R/W
Access
R/W
Access
R
R/W
Access
R
R/W
Access
R/W
All information provided in this document is subject to legal disclaimers.
Value
000000
00 (reset)
01
10
11
Value
11101101 defines the device (= link) identification number
Value
0000
1010
Value
*
000000
*
Value
00000
***
Value
000
*****
Value
0000000
*
Rev. 05 — 23 April 2010
Description
not used
defines the type of Pseudo-Random Binary Sequence (PRBS)
generator to be used:
Description
Description
not used
defines the bank ID – extension to DID
Description
scrambling enabled
not used
defines the number of lanes per converter device, minus 1
Description
not used
defines the number of octets per frame, minus 1
Description
not used
defines the number of frames per multiframe, minus 1
Description
not used
defines the number of converters per device, minus 1
PRBS-7
PRBS-7
PRBS-23
PRBS-31
ADC1213D series
ADC1213D series
© NXP B.V. 2010. All rights reserved.
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