adc1213d125hn/c1 NXP Semiconductors, adc1213d125hn/c1 Datasheet - Page 13

• Manufacturer Part Number: adc1213d125hn/c1
• Description: Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps
• Manufacturer: NXP Semiconductors

NXP Semiconductors
13. SPI timing
Table 8.
[1]
14. Application information
ADC1213D_SER_5
Preliminary data sheet
Symbol
Serial Peripheral Interface timings
t
t
t
t
t
f
w(SCLK)
w(SCLKH)
w(SCLKL)
su
h
clk(max)
Typical values measured at V
range T
100 Ω differential applied to serial outputs; unless otherwise specified.
amb
Characteristics
= −40 °C to +85 °C at V
14.1.1 Input stage description
14.1 Analog inputs
Parameter
SCLK pulse width
SCLK HIGH pulse width
SCLK LOW pulse width
set-up time
hold time
maximum clock frequency
The analog input of the ADC1213D supports differential or single-ended input drive.
Optimal performance is achieved using differential inputs with the common-mode input
voltage (V
The full scale analog input voltage range is configurable between ± 1 V (p-p) and
± 2 V (p-p) via a programmable internal reference (see
further details).
Figure 6
ElectroStatic Discharge (ESD) protection and circuit and package parasitics.
Fig 5.
DDA
= 3 V, V
shows the equivalent circuit of the sample and hold input stage, including
SPI timings
DDA
I(cm)
SCLK
SDIO
CS
= 3 V, V
) on pins INxP and INxM set to 0.5V
DDD
All information provided in this document is subject to legal disclaimers.
= 1.8 V, T
DDD
t
su
R/W
Conditions
data to SCLKH
CS to SCLKH
data to SCLKH
CS to SCLKH
= 1.8 V; V
Rev. 05 — 23 April 2010
amb
W1
= 25 °C. Minimum and maximum values are across the full temperature
t
h
t
I
su
(INAP, INBP) − V
W0
t
w(SCLK)
A12
I
(INAM,INBM) = −1 dBFS; internal reference mode;
Min
40
16
16
5
5
2
2
-
A11
t
w(SCLKL)
DDA
ADC1213D series
t
w(SCLKH)
.
Section 14.2
D2
Typ
-
-
-
-
-
-
-
-
D1
and
Max
-
-
-
-
-
-
-
25
D0
ADC1213D series
© NXP B.V. 2010. All rights reserved.
t
h
005aaa065
Table 21
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
for
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