adc1213d125hn/c1 NXP Semiconductors, adc1213d125hn/c1 Datasheet - Page 11
adc1213d125hn/c1
Manufacturer Part Number
adc1213d125hn/c1
Description
Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps
Manufacturer
NXP Semiconductors
Datasheet
1.ADC1213D125HNC1.pdf
(41 pages)
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11. Clock and digital output timing
Table 7.
[1]
Symbol Parameter
Clock timing input: pins CLKP and CLKM
f
t
δ
t
t
clk
lat(data)
d(s)
wake
clk
Typical values measured at V
V
DDD
= 1.8 V; V
clock frequency
data latency time
clock duty cycle
sampling delay time
wake-up time
Characteristics
I
(INAP, INBP) − V
[1]
DDA
Conditions
clock cycles
DCS_EN = 1:
en
DCS_EN = 0:
dis
= 3 V, V
I
(INAM, INBM) = −1 dBFS; internal reference mode; 100 W differential applied to serial outputs; unless otherwise specified.
DDD
= 1.8 V, T
ADC1213D065
Min
20
307
30
45
-
-
amb
= 25 °C. Minimum and maximum values are across the full temperature range T
Typ
-
-
50
50
0.8
<tbd>
Max
65
850
70
55
-
-
ADC1213D080
Min
60
250
30
45
-
-
Typ
-
-
50
50
0.8
<tbd>
80
-
-
Max
283
70
55
ADC1213D105
Min
75
190
30
45
-
-
Typ
-
-
50
50
0.8
<tbd>
Max
105
226
70
55
-
-
ADC1213D125
Min
100
160
30
45
-
-
amb
= −40 °C to +85 °C at V
Typ
-
-
50
50
0.8
<tbd>
Max
125
170
70
55
-
-
Unit
Msps
ns
%
%
ns
ns
DDA
= 3 V,
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