IDT72T54262L6-7BB IDT, Integrated Device Technology Inc, IDT72T54262L6-7BB Datasheet - Page 34

• Manufacturer Part Number: IDT72T54262L6-7BB
• Description: IC FIFO DDR/SDR QUAD/DUAL 324BGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Tr

Specifications of IDT72T54262L6-7BB

• Function: Asynchronous
• Memory Size: 5.2K (262 x 20)
• Access Time: 3.8ns
• Voltage - Supply: 2.375 V ~ 2.625 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 324-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Rate: -
• Other names: 72T54262L6-7BB

NOTES:
1. This timing diagram shows the partial reset timing for a single FIFO. Each PRS is independent of the others.
2. During partial reset the high-impedance control of the Qn data outputs are provided by OE only, RCS can be HIGH or LOW until the first rising edge of RCLK after master reset.
3. If Dual mode is selected, outputs Q[19:10] and Q[39:30] are not used if outputs are configured to x10.
IDT72T54242/72T54252/72T54262 2.5V QUAD/DUAL TeraSync
32K x 10 x 4/16K x 20 x 2, 64K x 10 x 4/32K x 20 x 2 and 128K x 10 x 4/64K x 20 x 2
Q[39:0]
SWEN,
EF/OR
SREN
FF/IR
PRS
WEN
REN
PAF
PAE
(3)
t
t
RSS
RSS
t
t
t
t
t
RSF
RSF
RSF
RSF
RSF
t
RS
Figure 11. Partial Reset Timing
If FWFT = HIGH, OR = HIGH
If FWFT = LOW, EF = LOW
If FWFT = LOW, EF = HIGH
If FWFT = HIGH, IR = LOW
™
34
DDR/SDR FIFO
OE = HIGH
OE = LOW
t
t
RSR
RSR
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FEBRUARY 11, 2009
6158 drw16