MT29F1G08ABBHC-ET Micron, MT29F1G08ABBHC-ET Datasheet - Page 39

• Manufacturer Part Number: MT29F1G08ABBHC-ET
• Description: NAND Flash Memory; Density: 1Gb; Organization: 128Mbx8; Bits/Cell: SLC; I/O: Common; Supply Voltage: 1.8V; Operating Temperature Range: -40° to +85°C; Package: 63-VFBGA
• Manufacturer: Micron

BLOCK LOCK Feature
WP# and BLOCK LOCK
UNLOCK 23h-24h
PDF: 09005aef81dc05df / Source: 09005aef821d5f08
1gb_nand_m48a__2.fm - Rev. E 1/08 EN
The BLOCK LOCK feature provides the ability to protect the entire device or ranges of
blocks from PROGRAM and ERASE operations. Using this BLOCK LOCK feature offers
increased functionality and flexibility over using just WP# to prevent PROGRAM and
ERASE operations.
BLOCK LOCK features are enabled and disabled at power-on through the use of the
LOCK signal. At power-on, if LOCK is LOW, all BLOCK LOCK commands are disabled.
However, at power-on, if LOCK is HIGH, the BLOCK LOCK commands are enabled and,
by default, all of the blocks on the device are protected, or locked, from PROGRAM and
ERASE operations, even if WP# is HIGH.
Before the contents of the device can be modified, the device must first be unlocked.
Either a range of blocks or the entire device can be unlocked. PROGRAM and ERASE
operations complete successfully only in the block ranges that have been unlocked.
Blocks, once unlocked, can be locked again to protect them from further PROGRAM and
ERASE operations.
Blocks that are locked can be protected further, or locked tight. When locked tight, the
device’s blocks can no longer be locked or unlocked until WP# is pulled LOW for more
than 100ns. After WP# goes LOW for this period, the entire device is locked from PRO-
GRAM and ERASE operations until unlocked again.
When the BLOCK LOCK feature is enabled, it interacts with WP# as follows:
• WP# must be driven HIGH and remain HIGH when UNLOCK and LOCK-TIGHT com-
• Holding WP# LOW locks all blocks.
• If WP# is held LOW to lock blocks, and then returned to HIGH, a new UNLOCK com-
By default at power-on, if LOCK is HIGH, all of the blocks in the NAND Flash device are
locked, meaning that they are protected from PROGRAM and ERASE operations. The
UNLOCK (23h) command is used to unlock a range of blocks. Unlocked blocks have no
protection and can be programmed or erased.
The UNLOCK command uses two registers—a lower boundary block address register
and an upper boundary block address register—and the invert area bit to determine
which range of blocks is unlocked. When the invert area bit = 0, the range of blocks
within the lower and upper boundary address registers is unlocked. When the invert
area bit = 1, the range of blocks outside the boundaries of the lower and upper boundary
address registers are unlocked. The lower boundary block address must be less than the
upper boundary block address. Figures 28 and 29 on page 40 show examples of how the
lower and upper boundary address registers work with the invert area bit.
To unlock a range of blocks, issue the UNLOCK (23h) command followed by the appro-
priate ADDRESS cycles that indicate the lower boundary block address. Then issue the
24h command followed by the appropriate ADDRESS cycles that indicate the upper
boundary block address. The least significant page address bit, PA0, should be set to “1”
if setting the invert area bit; otherwise, it should be “0.” The other page address bits
should be “0” (see Figure 30 on page 41).
mands are issued.
mand must be issued to unlock blocks.
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
1Gb: x8, x16 NAND Flash Memory
Command Definitions
©2006 Micron Technology, Inc. All rights reserved.