AN1836-AN21161 Analog Devices, AN1836-AN21161 Datasheet - Page 9

• Manufacturer Part Number: AN1836-AN21161
• Description: Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 (24-bit/96 kHz) Multichannel Codec
• Manufacturer: Analog Devices

Figure 7. ADSP-21161 Architecture Block Diagram
The complexity of DSP algorithms increases with the introduction of new audio standards and requirements, and designers are
looking to 24-bit converters like the AD1836 to increase signal quality in their low-cost multichannel audio applications. To
preserve the quality of 24-bit samples requires at least 32 bits during signal processing is recommended to ensure that the
algorithm’s noise floor won’t exceed the 24-bit input signal. With the AD1836's 24-bit audio data, the ADSP-21161's 32-bit
processing is especially useful for complex math-intensive or recursive processing with IIR filters. For example, parametric
nd
and graphic equalizer implementations using cascaded 2
-order IIR filters, and comb/allpass filters for audio are more robust
using 32-bit math. The ADSP-21161's 32-bit processing can remove many implementation restrictions on the filter structure
that might be present for smaller width DSPs, resulting in smaller sized, faster algorithms. Designers can select any filter
structure without worrying about the level of the noise floor, thereby eliminating the need for double-precision math and error-
feedback schemes. With a 32-bit DSP like the ADSP-21161, providing 14 bits below the noise floor, quantization errors would
have to accumulate to 86 dB from the LSB of the 32-bit word before the AD1836's DACs could see them.
To maintain high audio-signal quality well above the 105 dB noise floor of the AD1836, the ADSP-21161 EZ-KIT Lite system
is an excellent reference design which enables the DSP programmer to implement algorithms such that all intermediate DSP
calculations using a precision higher than the bit length of the quantized input data, using either 32-bit fixed point or 32-bit/40-
bit floating point processing. The ADSP-21161 also provides the ability to use high-precision 40-bit storage between the DSP's
memory and computation units for extended precision floating point operations. The use of optimal (low-noise) filter
algorithms, higher precision filter coefficients and higher precision storage of intermediate samples (available with 80-bit
extended precision in the MAC unit) ensure that errors that arise during ADSP-21161 arithmetic computations are much smaller
than the error introduced by the AD1836 D/As when it generates an output signal. We then ensure that the ADSP-21161's
digital-filter’s noise floor will be lower than the resolution of the AD1836 data converters, and in many cases in many cases the
only limiting factor to maintaining a high digital audio system SNR is only the precision of the AD1836's 24-bit data
converters.
Clearly, systems built with the AD1836 implementing complex, recursive algorithms will require at least 32-bit processing to
ensure that a filter algorithm's quantization noise artifacts won’t exceed the 24-bit input signal. The ADSP-21161 is an
attractive 32-bit alternative with it's SIMD architecture and rich peripheral set. With optimal filter implementations, the
AD1836's 24-bit D/As never will see any quantization noise introduced in the 32-bit computations generated by the ADSP-
21161. In many cases, an audio designer can choose from several 2nd-order structures which may be faster but are more
susceptible to generating noise, as long as the accuracy of the arithmetic result remains greater than the 105 dB. Thus, the 32-
bit processing capability of the ADSP-21161 guarantees that the noise artifacts remain below the AD1836's 105-dB noise floor
and hence maintains the dynamic range of the audio signal.