AN1836-AN21161 Analog Devices, AN1836-AN21161 Datasheet - Page 42

• Manufacturer Part Number: AN1836-AN21161
• Description: Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 (24-bit/96 kHz) Multichannel Codec
• Manufacturer: Analog Devices

6.2 Multichannel, DMA and ISR Methods of Implementation For Processing 48 kHz Data
Now that we have examined in section 6.1 the relative timing difference in SPORT TX and RX interrupts between the transmit
and receive channels, we will investigate a SPORT0 receive interrupt implementation methods to process all audio streams
to/from the AD1836.
In certain applications, the user may want to process codec data elsewhere. For example, in C-based applications, the C-
runtime DSP routines may be placed in a main program 'while' loop waiting for SPORT interrupts. The codec interrupt service
routine's responsibility would be to receive and transmit codec data, while the processing of the data is done elsewhere. For
example, the ADSP-21161 EZ-KIT Lite demos examples use a double buffering scheme, which allows the user to copy data
into a temporary buffer, such that while the DMA buffers are currently being filled, the user processed data from alternate
background buffers. After audio data is processed, the information is copied to the transmit user buffer.
To prepare DAC data to transmit in the next audio frame, the DSP's SPORT ISR instructions should simply include DM data
transfers the appropriate locations in the SPORT transmit DMA buffer, which in turn is transferred out of the serial port on the
next TDM frame sync assertion. The DSP's SPORT interrupt routine then executes instructions to ensure that it will place
processed data in the left channel slots (slot 0, slot1, slot2, slot3) and the right channel slots (slot4, slot5, slot6, slot7).
This single sample processing method is more of a pipelined FIFO approach, in which we always will transmit the newly
processed sample to the DACs in the next audio frame every time we get the new ADC sample and process it.
Let's look at the ADSP-21161 Assembly Language Instructions that are incorporated in our 21161 codec SPORT0 Interrupt
Service Routine (in Appendix A) that demonstrate how we process the audio data.
1) The following instructions demonstrate how to copy new AD1836 ADC data for all incoming timeslots and save our current
left and right channel data for processing (this "double buffers" the incoming data so that it does not get overwritten by current
SPORT DMA receive operations when executing larger algorithms):
Process_AD1836_Audio_Samples:
2) We then call our DSP algorithm:
do_audio_processing:
3) After processing our incoming ADC data, we send our processed results to the AD1836 DACs in the next audio frame. To
accomplish this, we simply copy our results from our output audio variables and place them in the SPORT tx DMA "queue" in
tx_buf2a[ ].
playback_AD1836_left_DACs:
playback_AD1836_right_DACs:
/* get AD1836 left channel input samples, save to data holders for processing */
r0
r0
r0
/* get AD1836 right channel input samples, save to data holders for processing */
r0
r0
r0
call (pc, process_audio);
/* ---- DSP processing is finished, now playback results to AD1836 ---- */
r0
r1
r2
r3
r0
r1
r2
r3
= dm(rx0a_buf + Internal_ADC_L0); dm(Left_Channel_In0) = r0;
= dm(rx0a_buf + Internal_ADC_L1); dm(Left_Channel_In1) = r0;
= dm(rx0a_buf + AUX_ADC_L0);
= dm(rx0a_buf + Internal_ADC_R0); dm(Right_Channel_In0) = r0;
= dm(rx0a_buf + Internal_ADC_R1); dm(Right_Channel_In1) = r0;
= dm(rx0a_buf + AUX_ADC_R0);
= dm(Left_Channel_Out0);
= dm(Left_Channel_Out1);
= dm(Left_Channel_Out2);
= dm(Left_Channel_AD1852);
= dm(Right_Channel_Out0);
= dm(Right_Channel_Out1);
= dm(Right_Channel_Out2);
= dm(Right_Channel_AD1852);
dm(Left_Channel_SPDIF_rx) = r r0;
dm(Right_Channel_SPDIF_rx) = r0;
/* output processed left ch audio samples to AD1836 */
dm(tx2a_buf + Internal_DAC_L0) = r0;
dm(tx2a_buf + Internal_DAC_L1) = r1;
dm(tx2a_buf + Internal_DAC_L2) = r2;
dm(tx2a_buf + AUX_DAC_L0) = r3;
/* output processed right ch audio samples to AD1836 */
dm(tx2a_buf + Internal_DAC_R0) = r0;
dm(tx2a_buf + Internal_DAC_R1) = r1;
dm(tx2a_buf + Internal_DAC_R2) = r2;
dm(tx2a_buf + AUX_DAC_R0) = r3;