AN1836-AN21161 Analog Devices, AN1836-AN21161 Datasheet - Page 15

• Manufacturer Part Number: AN1836-AN21161
• Description: Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 (24-bit/96 kHz) Multichannel Codec
• Manufacturer: Analog Devices

The audio input frame (data samples sent to the DSP from the AD1836) begins with a low to high transition of FSTDM (FS0).
FSTDM is synchronous to the rising edge of ABCLK (SCLK0). On the immediately following falling edge of ABCLK, the
AD1836 generates the assertion of FSTDM. This falling edge marks the time when both sides of serial link are aware of the
start of a new audio frame. On the next rising of ABCLK, the AD1836 transitions ASDATA1 into the first bit position of slot
0. Each new bit position is presented to the TDM link on a rising edge of ABCLK, and subsequently sampled by the ADSP-
21161 on the following falling edge of ABCLK. This sequence ensures that data transitions, and subsequent sample points for
both incoming and outgoing data streams are time aligned. The ASDATA1's composite stream is MSB justified (MSB first)
with all non-valid slot positions (for assigned and/or unassigned time slots) stuffed with 0’s by the AD1836. ASDATA1 data is
sampled on the falling edges of ABCLK.
ASDATA1
Figure 15. Start of an Audio Input Frame
FSTDM
ABCLK
End of previous
Audio Frame
ADSP-21161 samples SYNC assertion here
D31
ADSP-211161 DSP samples
first ASDATA1 bit of
D30
frame here
D29
FS0
SCLK0
D0A