AN1836-AN21161 Analog Devices, AN1836-AN21161 Datasheet - Page 33
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AN1836-AN21161
Manufacturer Part Number
AN1836-AN21161
Description
Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 (24-bit/96 kHz) Multichannel Codec
Manufacturer
Analog Devices
Datasheet
1.AN1836-AN21161.pdf
(70 pages)
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The ADSP-21161 assembly code instructions are shown below for configuring the SPORT1/SPORT3 pair for SPI emulation in
order to provide the capability to program the AD1836 registers
4.3
The ADSP-21161 EZ-KIT lite allows the programming of the AD1836 registers via the SPI port. This method will work with
the next revision of AD1836 silicon, which will not have the extra clock requirement to latch data. To program the AD1836
registers via the SPI interface, the SPICTL register is programmed as follows:
SPICTL Register (Configured as a master SPI device)
The ADSP-21161 assembly code instructions are shown below for configuring the SPI interface in order to provide the
capability to program the AD1836 registers
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/* clear multichannel/miscellaneous control register for SPORT1 & SPORT3 */
R0
R0
R0
bit set ustat1
dm(SPCTL3) = ustat1;
bit set ustat2
bit clr ustat2
dm(SPCTL1) = ustat2;
bit set imask
Programming the ADSP-21161 SPI Master Port to Communicate with the AD1836
SPI-Compatible Port
SPI Enable
Master SPI Device
SPI Transmit Interrupt Enable
Use FLAG0 as device select
CPHASE=1
SPI Word Length = 16-bits
Baud Rate = 3.123 MHz
MSB first
Sign Extend
bit set
bit set
bit set
/* configure SPI port for interface to the AD1852 */
ustat1
bit set ustat1
bit set ustat1
dm(SPICTL) = ustat1;
= 0x0;
= 0x0011002B;
= 0;
= dm(SPICTL);
LIRPTL SPITMSK;
MODE1 IRPTEN;
IMASK LPISUMI;
SP1I | SP3I;
DDIR | SDEN_A | LAFS | LFS |
SDEN_A | LAFS | LFS | FSR | CKRE | SLEN16 | SPEN_A;
DDIR | IFS | ICLK;
SPIEN|SPTINT|TDMAEN|MS|FLS0|CPHASE|DF|WL16|BAUDR3|PSSE|DCPH0|SGN|GM;
CP|FLS0|FLS2|FLS3|SMLS|DMISO|OPD|PACKEN|SENDZ|RDMAEN|SPRINT;
dm(SP13MCTL) = R0;
dm(DIV3) = R0;
dm(DIV1) = R0;
// enable SPORT1 RX and SPORT3 TX interrupts
// enable SPI TX interrupts
// allow global interrupts
// unmask spi interrupts
//enable SPI port
IFS | FSR | CKRE | ICLK | SLEN16 | SPEN_A;
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