AN1836-AN21161 Analog Devices, AN1836-AN21161 Datasheet - Page 46
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AN1836-AN21161
Manufacturer Part Number
AN1836-AN21161
Description
Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 (24-bit/96 kHz) Multichannel Codec
Manufacturer
Analog Devices
Datasheet
1.AN1836-AN21161.pdf
(70 pages)
- Current page: 46 of 70
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Init_DSP:
Blink_LEDs_Test:
delay:
blink_loop:
/* *** Enable circular buffering in MODE1 Register for revision 0.x silicon.
bit set MODE1 CBUFEN;
/* Setup hardware interrupts, FLAG LEDs and pushbutton */
ustat2=0x00000000;
/* flags 4-9 are outputs for LEDs, turn on all LEDs*/
bit set ustat2 FLG9O|FLG8O|FLG7O|FLG6O|FLG5O|FLG4O;
bit set ustat2 FLG9|FLG8|FLG7|FLG6|FLG5|FLG4;
dm(IOFLAG)=ustat2;
bit clr MODE2 FLG0O | FLG1O | FLG2O | FLG3O;
IMASK = 0x0;
LIRPTL = 0x0;
IRPTL = 0x00000000;
bit set mode2 IRQ2E | IRQ0E | IRQ1E; /* irqx edge sensitive
bit set mode1 IRPTEN | NESTM;
bit set imask IRQ0I | IRQ1I | IRQ2I; /* irq0, irq1 and irq2 enabled */
L0 = 0;
L1 = 0;
L2 = 0;
L3 = 0;
L4 = 0;
L5 = 0;
L6 = 0;
L7 = 0;
L8 = 0;
L9 = 0;
L10 = 0;
L11 = 0;
L12 = 0;
L13 = 0;
L14 = 0;
L15 = 0;
rts;
/* Setup FLAG 4-11 outputs */
ustat2=dm(IOFLAG);
bit set ustat2 FLG9O|FLG8O|FLG7O|FLG6O|FLG5O|FLG4O;
bit clr ustat2 FLG9|FLG8|FLG7|FLG6|FLG5|FLG4;
dm(IOFLAG)=ustat2;
/* Blink flags 5 times (twice per second) */
lcntr=10, do blink_loop until lce;
rts;
Important when porting 2106x code!!! */
lcntr=6250000;
do delay until lce;
nop;
bit tgl ustat2 FLG9|FLG8|FLG7|FLG6|FLG5|FLG4;
dm(IOFLAG)=ustat2;
/* clear pending interrupts */
/* enable global interrupts, nesting */
/* flag 0-3 are inputs from pushbutton switches
/* clear flags to start*/
*/
*/
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