LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 5

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LM3S2110-IQN20-A0

Manufacturer Part Number
LM3S2110-IQN20-A0
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
10.4
10.5
11
11.1
11.2
11.2.1 Transmit/Receive Logic ........................................................................................................... 235
11.2.2 Baud-Rate Generation ............................................................................................................. 236
11.2.3 Data Transmission .................................................................................................................. 237
11.2.4 Serial IR (SIR) ......................................................................................................................... 237
11.2.5 FIFO Operation ....................................................................................................................... 238
11.2.6 Interrupts ................................................................................................................................ 238
11.2.7 Loopback Operation ................................................................................................................ 239
11.2.8 IrDA SIR block ........................................................................................................................ 239
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Bit Rate Generation ................................................................................................................. 276
12.2.2 FIFO Operation ....................................................................................................................... 276
12.2.3 Interrupts ................................................................................................................................ 276
12.2.4 Frame Formats ....................................................................................................................... 277
12.3
12.4
12.5
13
13.1
13.2
13.2.1 I
13.2.2 Available Speed Modes ........................................................................................................... 315
13.2.3 Interrupts ................................................................................................................................ 316
13.2.4 Loopback Operation ................................................................................................................ 316
13.2.5 Command Sequence Flow Charts ............................................................................................ 316
13.3
13.4
13.5
13.6
14
14.1
14.2
14.3
14.4
14.4.1 Initialization ............................................................................................................................. 349
14.4.2 Operation ............................................................................................................................... 350
14.4.3 Transmitting Message Objects ................................................................................................. 350
14.4.4 Configuring a Transmit Message Object .................................................................................... 350
November 29, 2007
Register Map .......................................................................................................................... 212
Register Descriptions .............................................................................................................. 213
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 234
Block Diagram ........................................................................................................................ 235
Functional Description ............................................................................................................. 235
Initialization and Configuration ................................................................................................. 239
Register Map .......................................................................................................................... 240
Register Descriptions .............................................................................................................. 241
Synchronous Serial Interface (SSI) ................................................................................ 275
Block Diagram ........................................................................................................................ 275
Functional Description ............................................................................................................. 275
Initialization and Configuration ................................................................................................. 284
Register Map .......................................................................................................................... 285
Register Descriptions .............................................................................................................. 286
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 312
Functional Description ............................................................................................................. 312
Initialization and Configuration ................................................................................................. 323
I
Register Descriptions (I
Register Descriptions (I2C Slave) ............................................................................................. 338
Controller Area Network (CAN) Module ......................................................................... 347
Controller Area Network Overview ............................................................................................ 347
Controller Area Network Features ............................................................................................ 347
Controller Area Network Block Diagram .................................................................................... 348
Controller Area Network Functional Description ......................................................................... 349
2
2
C Bus Functional Overview .................................................................................................... 313
C Register Map ..................................................................................................................... 324
2
C Master) ........................................................................................... 325
2
C) Interface ............................................................................ 312
Preliminary
LM3S2110 Microcontroller
5

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