LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 13

• Manufacturer Part Number: LM3S2110-IQN20-A0
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Register 15:
Register 16:
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Register 18:
General-Purpose Input/Outputs (GPIOs) ................................................................................... 134
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Register 2:
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Register 9:
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Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
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Register 25:
Register 26:
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Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
General-Purpose Timers ............................................................................................................. 175
Register 1:
Register 2:
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Register 5:
Register 6:
Register 7:
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Register 9:
Register 10:
November 29, 2007
Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C ................................... 130
Flash Memory Protection Program Enable 1 (FMPPE1), offset 0x404 ............................... 131
Flash Memory Protection Program Enable 2 (FMPPE2), offset 0x408 ............................... 132
Flash Memory Protection Program Enable 3 (FMPPE3), offset 0x40C ............................... 133
GPIO Data (GPIODATA), offset 0x000 ............................................................................ 141
GPIO Direction (GPIODIR), offset 0x400 ......................................................................... 142
GPIO Interrupt Sense (GPIOIS), offset 0x404 .................................................................. 143
GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 144
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 145
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 146
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 147
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 148
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 149
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 150
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 152
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 153
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 154
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 155
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 156
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 157
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 158
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 159
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 160
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 161
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 163
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 164
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 165
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 166
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 167
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 168
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 169
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 170
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 171
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 172
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 173
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 174
GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 187
GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 188
GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 190
GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 192
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 195
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 197
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 198
GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 199
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 201
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 202
Preliminary
LM3S2110 Microcontroller
13