LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 412

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LM3S2110-IQN20-A0

Manufacturer Part Number
LM3S2110-IQN20-A0
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Pulse Width Modulator (PWM)
PWM Output Fault (PWMFAULT)
Base 0x4002.8000
Offset 0x010
Type R/W, reset 0x0000.0000
412
Reset
Reset
Type
Type
Bit/Field
31:2
1
0
RO
RO
31
15
0
0
Register 5: PWM Output Fault (PWMFAULT), offset 0x010
This register controls the behavior of the PWM outputs in the presence of fault conditions. Both the
fault input and debug events are considered fault conditions. On a fault condition, each PWM signal
can either be passed through unmodified or driven Low. For outputs that are configured for
pass-through, the debug event handling on the corresponding PWM generator also determines if
the PWM signal continues to be generated.
Fault condition control happens before the output inverter, so PWM signals driven Low on fault are
inverted if the channel is configured for inversion (therefore, the pin is driven High on a fault condition).
RO
RO
30
14
0
0
reserved
Name
Fault1
Fault0
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
R/W
0
0
RO
RO
RO
26
10
0
0
Reset
0x00
0
0
RO
RO
25
0
9
0
reserved
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM1 Driven Low on Fault
When set, the PWM1 output signal is driven Low on a fault condition.
PWM0 Driven Low on Fault
When set, the PWM0 output signal is driven Low on a fault condition.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
November 29, 2007
RO
RO
18
0
2
0
Fault1
R/W
RO
17
0
1
0
Fault0
R/W
RO
16
0
0
0

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