LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 411

no-image

LM3S2110-IQN20-A0

Manufacturer Part Number
LM3S2110-IQN20-A0
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
PWM Output Inversion (PWMINVERT)
Base 0x4002.8000
Offset 0x00C
Type R/W, reset 0x0000.0000
November 29, 2007
Reset
Reset
Type
Type
Bit/Field
31:2
1
0
RO
RO
31
15
0
0
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C
This register provides a master control of the polarity of the PWM signals on the device pins. The
PWM signals generated by the PWM generator are active High; they can optionally be made active
Low via this register. Disabled PWM channels are also passed through the output inverter (if so
configured) so that inactive channels maintain the correct polarity.
RO
RO
30
14
0
0
PWM1Inv
PWM0Inv
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
R/W
0
0
RO
RO
RO
26
10
0
0
Reset
0x00
0
0
RO
RO
25
0
9
0
reserved
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Invert PWM1 Signal
When set, the generated PWM1 signal is inverted.
Invert PWM0 Signal
When set, the generated PWM0 signal is inverted.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S2110 Microcontroller
RO
RO
19
0
3
0
RO
RO
18
0
2
0
PWM1Inv
R/W
RO
17
0
1
0
PWM0Inv
R/W
RO
16
0
0
0
411

Related parts for LM3S2110-IQN20-A0