LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 415

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LM3S2110-IQN20-A0

Manufacturer Part Number
LM3S2110-IQN20-A0
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
PWM Interrupt Status and Clear (PWMISC)
Base 0x4002.8000
Offset 0x01C
Type R/W1C, reset 0x0000.0000
November 29, 2007
Reset
Reset
Type
Type
Bit/Field
31:17
15:1
16
0
RO
RO
31
15
0
0
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C
This register provides a summary of the interrupt status of the PWM generator block. A bit set to 1
indicates that the generator block is asserting an interrupt. The individual interrupt status registers
must be consulted to determine the reason for the interrupt, and used to clear the interrupt. For the
fault interrupt, a write of 1 to that bit position clears the latched interrupt status.
RO
RO
30
14
0
0
IntPWM0
reserved
reserved
IntFault
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
R/W1C
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
RO
26
10
0
0
Reset
0x00
0x00
0
0
RO
RO
25
0
9
0
Preliminary
reserved
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Fault Interrupt Asserted
Indicates if the fault input is asserting an interrupt.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM0 Interrupt Status
Indicates if the PWM generator 0 block is asserting an interrupt.
RO
RO
24
0
8
0
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S2110 Microcontroller
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
0
1
0
IntPWM0
IntFault
R/W1C
RO
16
0
0
0
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