IDT88P8341 Integrated Device Technology, IDT88P8341 Datasheet - Page 53

• Manufacturer Part Number: IDT88P8341
• Description: Spi Exchange Spi-3 To Spi-4
• Manufacturer: Integrated Device Technology

Primary interrupt status register (0x2C in the
direct accessed space)
TABLE 44 - PRIMARY INTERRUPT STATUS REGIS-
TER (0x2C IN THE DIRECT ACCESSED SPACE)
read-only access. The interrupts for the primary interrupt status register must
be acknowledged by servicing the corresponding secondary interrupt status
registers.
allowing an interrupt in the Module Status Register (secondary interrupt register
0x24).
in the SPI-4 status register (secondary interrupt register 0x22).
allowing an interrupt in the Secondary Interrupt Status Register (secondary
interrupt register 0x2D).
Secondary interrupt status register (0x2D in the
direct accessed space)
TABLE 45 - SECONDARY INTERRUPT STATUS
REGISTER (0x2D IN THE DIRECT ACCESSED SPACE)
has read and write access.
fields are cleared by a microprocessor write cycle, where a logical one must
be written to clear the field(s) targeted.
and can only be active if the SECONDARY_EN field is active in the primary
interrupt enable register (Direct 0x2C).
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
MODULE_A
Reserved
SPI-4
SECONDARY
Reserved
Reserved
Reserved
TIME_BASE
INDIRECT_ACCESS
Reserved
The primary interrupt status register (0x2C in the direct accessed space) has
MODULE_A
0=No MODULE_A interrupt active
1=MODULE_A interrupt is active
SPI-4 When active, the SPI-4 field is responsible for allowing an interrupt
0=No SPI-4 interrupt active
1=SPI-4 interrupt is active
SECONDARY
0=No SECONDARY interrupt active
1=SECONDARY interrupt is active
The secondary interrupt status register (0x2D in the direct accessed space)
The secondary interrupt status register has read access, and Interrupt status
The secondary interrupt status register is a secondary interrupt status register
TIME_BASE
0=No time base event
1=Time base has expired
Field
Field
When active, the MODULE_A field is responsible for
When active, the SECONDARY field is responsible for
Time base expiration interrupt indication.
Bits
Bits
7:2
7:6
0
1
0
1
2
3
4
5
Length
Length
1
1
1
1
2
1
1
1
1
6
Initial Value
Initial Value
0
0
0
0
0
0
0
0
0
0
53
Primary interrupt enable register (0x2E in the
direct accessed space)
TABLE 46 - PRIMARY INTERRUPT ENABLE REGIS-
TER (0x2E IN THE DIRECT ACCESSED SPACE)
has read and write access.
in the Primary Interrupt Status Register.
Secondary interrupt enable register (0x2F in the
direct accessed space)
TABLE 47 - SECONDARY INTERRUPT ENABLE
REGISTER (0x2F IN THE DIRECT ACCESSED SPACE)
has read and write access.
interrupts in the secondary interrupt enable register.
Reserved
MODULE_A_EN
Reserved
Reserved
SPI4_EN
SECONDARY_EN
Reserved
TIME_BASE_EN
INDIRECT_ACCESS_EN
Reserved
INDIRECT_ACCESS
0=No indirect access event
1=Indirect access has completed
The primary interrupt enable register (0x2E in the direct accessed space)
The Primary Interrupt Enable Register is used to bitwise enable the interrupts
MODULE_A_EN
0=Disable MODULE_A interrupt
1=Enable MODULE_A interrupt
SPI-4_EN
0=Disable SPI-4 interrupt
1=Enable SPI-4 interrupt
SECONDARY_EN
0=Disable SECONDARY interrupt
1=Enable SECONDARY interrupt
The secondary interrupt enable register (0x2F in the direct accessed space)
The secondary interrupt enable register is used to bitwise enable the
TIME_BASE_EN
0=Disable time base event interrupt
1=Enable time base event interrupt
INDIRECT_ACCESS_EN
0= Disable indirect access completion event interrupt
1=Enable indirect access completion event interrupt
Field
Field
SPI-4 interrupt enable.
MODULE_A interrupt enable.
Time base expiration interrupt enable.
SECONDARY interrupt enable.
Indirect access completion interrupt indication.
INDUSTRIAL TEMPERATURE RANGE
Indirect access completion interrupt enable.
Bits
Bits
7:2
7:6
0
1
0
1
2
3
4
5
Length
Length
1
1
1
1
1
1
2
1
1
6
APRIL 10, 2006
Initial Value
Initial Value
0
0
0
0
0
0
0
0
0
0