IDT88P8341 Integrated Device Technology, IDT88P8341 Datasheet - Page 34

• Manufacturer Part Number: IDT88P8341
• Description: Spi Exchange Spi-3 To Spi-4
• Manufacturer: Integrated Device Technology

4.3.2 Microprocessor insert to SPI-3 egress
datapath
microprocessor data insert interface to a SPI-3 egress port.
the device.
microprocessor interface. The data available bit is set. Data is stored along with
its LP address, LID (including SPI-3 choice), error information, SOP, and EOP.
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
The diagram below shows the datapath through the device from the
The following is a description of the path taken by a fragment of data through
Data and control information are written to the insert buffer through the
Min: 19.44MHz
Max: 133MHz
8 bit / 32 bit
SPI-3
Figure 24. Microprocessor interface to SPI-3 egress detailed datapath diagram
t+1
t
t+258
SOP
7
JTAG
LID Counters Memory
Figure 23. Microprocessor data insert buffer
data[255]
data[2]
data[1]
data[0]
length
flags
lid
EA
uproc
Memory
SPI-3 /
LID map
Main
ED
A
34
PAR EOP
Data is stored in LID-allocated buffer segments. The Table 80, SPI-3 egress
port descriptor table (64 entries) is consulted and the PFP decides to move the
data to the SPI-3 egress port. The SPI-3 packet fragment processor chooses
the next LP. The choice of LP is dependent on the status of the LP and the
availability of a complete fragment. Data is moved to a SPI-3 egress buffer along
with its LP address. SPI-3 LP address, error information, SOP, and EOP.
interface.
Chip Counters Memory
Data is transmitted in packet fragments over the selected SPI-3 egress
0
t+1
t
t+258
SPI-4 /
LID map
EA
ED
PAR
address parity error
data parity error
packet error
6372 drw24
not used
INDUSTRIAL TEMPERATURE RANGE
6372 drw22
Max:400 MHz
Min: 80 MHz
SPI-4.2
APRIL 10, 2006