IDT88P8341 Integrated Device Technology, IDT88P8341 Datasheet - Page 2

• Manufacturer Part Number: IDT88P8341
• Description: Spi Exchange Spi-3 To Spi-4
• Manufacturer: Integrated Device Technology

Features ........................................................................................................................................................................................................................ 1
Applications .................................................................................................................................................................................................................. 1
1. Introduction ............................................................................................................................................................................................................. 8
2. Pin description ......................................................................................................................................................................................................... 9
3. External interfaces ................................................................................................................................................................................................. 13
4. Datapath and flow control .................................................................................................................................................................................... 23
5. Performance monitor and diagnostics ................................................................................................................................................................. 37
6. Clock generator ...................................................................................................................................................................................................... 38
7. Loopbacks .............................................................................................................................................................................................................. 39
8. Operation guide ..................................................................................................................................................................................................... 40
9. Register description .............................................................................................................................................................................................. 45
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
3.1 SPI-3 ............................................................................................................................................................................................................... 13
3.2 SPI-4 ............................................................................................................................................................................................................... 17
3.3 Microprocessor interface .................................................................................................................................................................................. 22
4.1 SPI-3 to SPI-4 datapath and flow control .......................................................................................................................................................... 25
4.2 SPI-4 to SPI-3 datapath and flow control .......................................................................................................................................................... 30
4.3 Microprocessor interface to SPI-3 datapath ...................................................................................................................................................... 33
5.1 Mode of operation ............................................................................................................................................................................................ 37
5.2 Counters ......................................................................................................................................................................................................... 37
5.3 Captured events .............................................................................................................................................................................................. 37
7.1 SPI-3 Loopback ............................................................................................................................................................................................... 39
8.1 Hardware operation ........................................................................................................................................................................................ 40
8.2 Software operation ........................................................................................................................................................................................... 40
9.1 Register access summary ................................................................................................................................................................................ 45
9.2 Direct access registers ..................................................................................................................................................................................... 49
3.1.1 SPI-3 ingress ........................................................................................................................................................................................ 13
3.1.2 SPI-3 egress ........................................................................................................................................................................................ 15
3.2.1 SPI-4 ingress ........................................................................................................................................................................................ 17
3.2.2 SPI-4 egress ........................................................................................................................................................................................ 20
3.2.3 SPI-4 startup handshake ....................................................................................................................................................................... 20
4.3.1 SPI-3 to ingress microprocessor interface datapath ................................................................................................................................ 33
4.3.2 Microprocessor insert to SPI-3 egress datapath ..................................................................................................................................... 34
4.3.3 Microprocessor interface to SPI-4 egress datapath ................................................................................................................................ 35
4.3.4 SPI-4 ingress to microprocessor interface datapath ................................................................................................................................ 36
5.2.1 LID associated event counters ............................................................................................................................................................... 37
5.2.2 Non - LID associated event counters ..................................................................................................................................................... 37
5.3.1 Non LID associated events .................................................................................................................................................................... 37
5.3.2 LID associated events ........................................................................................................................................................................... 37
5.3.3 Timebase .............................................................................................................................................................................................. 37
8.1.1 System reset ......................................................................................................................................................................................... 40
8.1.2 Power on sequence .............................................................................................................................................................................. 40
8.1.3 Clock domains ...................................................................................................................................................................................... 40
8.2.1 Chip configuration sequence ................................................................................................................................................................. 40
8.2.2 Logical Port activation and deactivation .................................................................................................................................................. 41
8.2.3 Buffer segment modification .................................................................................................................................................................... 41
8.2.4 Manual SPI-4 ingress LVDS bit alignment .............................................................................................................................................. 41
8.2.5 SPI-4 status channel software ............................................................................................................................................................... 42
8.2.6 IDT88P8341 layout guidelines .............................................................................................................................................................. 42
8.2.7 Software Eye-Opening Check on SPI-4 Interface .................................................................................................................................. 43
9.1.1 Direct register format ............................................................................................................................................................................. 45
9.1.2 Indirect register format ........................................................................................................................................................................... 45
5.3.2.1 Non critical events ...................................................................................................................................................................... 37
5.3.2.2 Critical events ............................................................................................................................................................................. 37
5.3.3.1 Internally generated timebase ..................................................................................................................................................... 37
5.3.3.2 Externally generated timebase .................................................................................................................................................... 37
Table of Contents
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INDUSTRIAL TEMPERATURE RANGE
APRIL 10, 2006