XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 86

• Manufacturer Part Number: XC908AS60ACFU
• Description: MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
• Manufacturer: Motorola Semiconductor Products

FLASH-2 Memory
Technical Data
86
NOTE:
The FLASH Programming Algorithm Flowchart is shown in
A. Programming and erasing of FLASH locations can not be performed
by code being executed from the same FLASH array.
B. While these operations must be performed in the order shown, other
unrelated operations may occur between the steps. Care must be taken
however to ensure that these operations do not access any address
within the FLASH array memory space such as the COP Control
Register (COPCTL) at $FFFF.
C. It is highly recommended that interrupts be disabled during
program/erase operations.
D. Do not exceed t
cumulative high voltage programming time to the same row before next
erase. t
max. Please also see
E. The time between each FLASH address change (step 7 to step 7), or
the time between the last FLASH address programmed to clearing the
PGM bit (step 7 to step 10) must not exceed the maximum programming
time, t
F. Be cautious when programming the FLASH-2 array to ensure that
non-FLASH locations are not used as the address that is written to when
selecting either the desired row address range in step 3 of the algorithm
or the byte to be programmed in step 7 of the algorithm. This applies
particularly to:
12. Clear the HVEN bit.
13. Wait for a time, t
•
normal read mode.
PROG
$0450-$047F: First row of FLASH-2 (48 bytes)
HV
must satisfy this condition: t
max.
FLASH-2 Memory
PROG
FLASH Memory Characteristics
RCV
maximum or t
, after which the memory can be accessed in
NVS
HV
+ t
maximum. t
NVH
MC68HC908AZ60A — Rev 2.0
+ t
PGS
HV
+ (t
is defined as the
PROG
on page 543.
Figure
MOTOROLA
X 64) ð t
5-4.
HV