XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 333
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
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20.9.2 TIMB Counter Registers
MC68HC908AZ60A — Rev 2.0
MOTOROLA
NOTE:
PS[2:0] — Prescaler Select Bits
The two read-only TIMB counter registers contain the high and low bytes
of the value in the TIMB counter. Reading the high byte (TBCNTH)
latches the contents of the low byte (TBCNTL) into a buffer. Subsequent
reads of TBCNTH do not affect the latched TBCNTL value until TBCNTL
is read. Reset clears the TIMB counter registers. Setting the TIMB reset
bit (TRST) also clears the TIMB counter registers.
If TBCNTH is read during a break interrupt, be sure to unlatch TBCNTL
by reading TBCNTL before exiting the break interrupt. Otherwise,
TBCNTL retains the value latched during the break.
These read/write bits select either the PTD4/ATD12/TBCLK pin or
one of the seven prescaler outputs as the input to the TIMB counter
as
Table 20-1
Timer Interface Module B (TIMB)
PS[2:0]
000
001
010
100
101
011
110
111
shows. Reset clears the PS[2:0] bits.
Table 20-1. Prescaler Selection
Internal Bus Clock ÷ 16
Internal Bus Clock ÷ 32
Internal Bus Clock ÷ 64
Internal Bus Clock ÷ 4
Internal Bus Clock ÷ 2
Internal Bus Clock ÷ 8
Internal Bus Clock ÷ 1
PTD4/ATD12/TBCLK
TIMB Clock Source
Timer Interface Module B (TIMB)
Technical Data
I/O Registers
333
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