XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 68
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
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FLASH-1 Memory
4.4.2 FLASH-1 Block Protect Register
Technical Data
68
Address:
ERASE — Erase Control Bit
PGM — Program Control Bit
The FLASH-1 Block Protect Register (FL1BPR) is implemented as a
byte within the FLASH-1 memory and therefore can only be written
during a FLASH programming sequence. The value in this register
determines the starting location of the protected range within the
FLASH-1 memory.
FL1BPR[7:0] — Block Protect Register Bit7 to Bit0
Read:
Write:
This read/write bit configures the memory for erase operation.
ERASE is interlocked with the PGM bit such that both bits cannot be
set at the same time.
This read/write bit configures the memory for program operation.
PGM is interlocked with the ERASE bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
These eight bits represent bits [14:7] of a 16-bit memory address. Bit-
15 is logic 1 and bits [6:0] are logic 0s.
1 = Erase operation selected
0 = Erase operation unselected
1 = Program operation selected
0 = Program operation unselected
Figure 4-2. FLASH-1 Block Protect Register (FL1BPR)
$FF80
BPR7
Bit 7
FLASH-1 Memory
BPR6
6
BPR5
5
BPR4
4
BPR3
3
MC68HC908AZ60A — Rev 2.0
BPR2
2
BPR1
1
MOTOROLA
BPR0
Bit 0
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