XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 322
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
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Timer Interface Module B (TIMB)
Technical Data
322
The free-running counter contents are transferred to the TIMB channel
register (TBCHxH–TBCHxL, see
340) on each proper signal transition regardless of whether the TIMB
channel flag (CH0F–CH1F in TBSC0–TBSC1 registers) is set or clear.
When the status flag is set, a CPU interrupt is generated if enabled. The
value of the count latched or “captured” is the time of the event. Because
this value is stored in the input capture register 2 bus cycles after the
actual event occurs, user software can respond to this event at a later
time and determine the actual time of the event. However, this must be
done prior to another input capture on the same pin; otherwise, the
previous time value will be lost.
By recording the times for successive edges on an incoming signal,
software can determine the period and/or pulse width of the signal. To
measure a period, two successive edges of the same polarity are
captured. To measure a pulse width, two alternate polarity edges are
captured. Software should track the overflows at the 16-bit module
counter to extend its range.
Another use for the input capture function is to establish a time
reference. In this case, an input capture function is used in conjunction
with an output compare function. For example, to activate an output
signal a specified number of clock cycles after detecting an input event
(edge), use the input capture function to record the time at which the
edge occurred. A number corresponding to the desired delay is added to
this captured value and stored to an output compare register (see
Channel Registers
output compares are referenced to the same 16-bit modulo counter, the
delay can be controlled to the resolution of the counter independent of
software latencies.
Reset does not affect the contents of the input capture channel register
(TBCHxH–TBCHxL).
Timer Interface Module B (TIMB)
on page 340). Because both input captures and
TIMB Channel Registers
MC68HC908AZ60A — Rev 2.0
on page
MOTOROLA
TIMB
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