XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 374

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
Input/Output Ports
22.9.2 Data Direction Register G
Technical Data
374
NOTE:
Address:
Data direction register G determines whether each port G pin is an input
or an output. Writing a logic 1 to a DDRG bit enables the output buffer
for the corresponding port G pin; a logic 0 disables the output buffer.
DDRG[2:0] — Data Direction Register G Bits
Avoid glitches on port G pins by writing to the port G data register before
changing data direction register G bits from 0 to 1.
Figure 22-22
Reset:
Read:
Write:
These read/write bits control port G data direction. Reset clears
DDRG[2:0], configuring all port G pins as inputs.
1 = Corresponding port G pin configured as output
0 = Corresponding port G pin configured as input
READ DDRG ($000E)
WRITE DDRG ($000E)
WRITE PTG ($000A)
READ PTG ($000A)
$000E
Bit 7
Figure 22-21. Data Direction Register G (DDRG)
R
R
0
0
shows the port G I/O logic.
= Reserved
Input/Output Ports
R
6
0
0
Figure 22-22. Port G I/O Circuit
RESET
R
5
0
0
DDRGx
PTGx
R
4
0
0
R
3
0
0
MC68HC908AZ60A — Rev 2.0
DDRG2
2
0
DDRG1
1
0
MOTOROLA
DDRG0
Bit 0
0
PTGx

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