XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 332

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
Timer Interface Module B (TIMB)
Technical Data
332
NOTE:
NOTE:
TOIE — TIMB Overflow Interrupt Enable Bit
TSTOP — TIMB Stop Bit
Do not set the TSTOP bit before entering wait mode if the TIMB is
required to exit wait mode. Also, when the TSTOP bit is set and the timer
is configured for input capture operation, input captures are inhibited
until TSTOP is cleared.
TRST — TIMB Reset Bit
Setting the TSTOP and TRST bits simultaneously stops the TIMB
counter at a value of $0000.
the clearing sequence is complete, then writing logic 0 to TOF has no
effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a logic
1 to TOF has no effect.
This read/write bit enables TIMB overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
This read/write bit stops the TIMB counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIMB
counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIMB counter and the TIMB
prescaler. Setting TRST has no effect on any other registers.
Counting resumes from $0000. TRST is cleared automatically after
the TIMB counter is reset and always reads as logic 0. Reset clears
the TRST bit.
1 = TIMB counter has reached modulo value
0 = TIMB counter has not reached modulo value
1 = TIMB overflow interrupts enabled
0 = TIMB overflow interrupts disabled
1 = TIMB counter stopped
0 = TIMB counter active
1 = Prescaler and TIMB counter cleared
0 = No effect
Timer Interface Module B (TIMB)
MC68HC908AZ60A — Rev 2.0
MOTOROLA

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