XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 174
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
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Clock Generator Module (CGM)
Technical Data
174
The operating range of the VCO is programmable for a wide range of
frequencies and for maximum immunity to external noise, including
supply and CGMXFC noise. The VCO frequency is bound to a range
from roughly one-half to twice the center-of-range frequency, f
Modulating the voltage on the CGMXFC pin changes the frequency
within this range. By design, f
range frequency, f
CGMRCLK is the PLL reference clock, a buffered version of CGMXCLK.
CGMRCLK runs at a frequency, f
a buffer. The buffer output is the final reference clock, CGMRDV,
running at a frequency f
The VCO’s output clock, CGMVCLK, running at a frequency f
is fed back through a programmable modulo divider. The modulo divider
reduces the VCO clock by a factor, N. The divider’s output is the VCO
feedback clock, CGMVDV, running at a frequency
f
information.
The phase detector then compares the VCO feedback clock, CGMVDV,
with the final reference clock, CGMRDV. A correction pulse is generated
based on the phase difference between the two signals. The loop filter
then slightly alters the dc voltage on the external capacitor connected to
CGMXFC based on the width and direction of the correction pulse. The
filter can make fast or slow corrections depending on its mode, as
described in
of the external capacitor and the reference frequency determines the
speed of the corrections and the stability of the PLL.
The lock detector compares the frequencies of the VCO feedback clock,
CGMVDV, and the final reference clock, CGMRDV. Therefore, the
speed of the lock detector is directly proportional to the final reference
frequency, f
lock condition based on this comparison.
CGMVDV
•
•
Loop filter
Lock detector
= f
Clock Generator Module (CGM)
CGMRDV
CGMVCLK
Acquisition and Tracking Modes
NOM
. The circuit determines the mode of the PLL and the
/N. See
, (4.9152 MHz) times a linear factor L or (L)f
CGMRDV
Programming the PLL
CGMVRS
CGMRCLK
= f
CGMRCLK
is equal to the nominal center-of-
, and is fed to the PLL through
.
MC68HC908AZ60A — Rev 2.0
on page 175. The value
for more
MOTOROLA
CGMVCLK
CGMVRS
NOM
.
,
.
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