XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 78
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XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
(576 pages)
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FLASH-2 Memory
5.3 Functional Description
Technical Data
78
NOTE:
The FLASH-2 memory is a non-continuos array consisting of a total of
29,616 bytes on the MC68HC908AS60A and 29,488 bytes on the
MC68HC908AZ60A. An erased bit reads as a logic 1 and a programmed
bit reads as a logic 0.
Memory in the FLASH-2 array is organized into rows within pages. There
are two rows of memory per page with 64 bytes per row. The minimum
erase block size is a single page,128 bytes. Programming is performed
on a per-row basis, 64 bytes at a time. Program and erase operations
are facilitated through control bits in the FLASH-2 Control Register
(FL2CR). Details for these operations appear later in this section.
The FLASH-2 memory map consists of:
Programming tools are available from Motorola. Contact your local
Motorola representative for more information.
A security feature prevents viewing of the FLASH contents.
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
•
•
•
•
•
•
$0450–$05FF: User Memory on MC68HC908AS60A (432 bytes)
$0450–$04FF: User Memory on MC68HC908AZ60A (176 bytes)
$0580–$05FF: User Memory on MC68HC908AZ60A (128 bytes)
$0E00–$7FFF: User Memory (29,616 bytes)
$FF81: FLASH-2 Block Protect Register (FL2BPR)
– Note that FL2BPR physically resides within FLASH-1 memory
$FE08: FLASH-2 Control Register (FL2CR)
addressing space
FLASH-2 Memory
MC68HC908AZ60A — Rev 2.0
(1)
MOTOROLA
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