MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 76

• Manufacturer Part Number: MSC8101DS
• Description: MSC8101 Network Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

Figure 2-10 shows Host DMA read timing.
2.5.5
2-22
CPM Timings
16
17
18
19
20
21
22
23
Note:
No.
1.
CPM Timings
FCC input setup time before low-to-high clock transition
FCC input hold time after low-to-high clock transition
SCC/SMC/SPI/I2C input setup time before low-to-high clock transition
SCC/SMC/SPI/I
TDM input setup time before low-to-high serial clock transition
TDM input hold time after low-to-high serial transition
PIO/TIMER/DMA input setup time before low-to-high serial clock transition
PIO/TIMER/DMA input hold time after low-to-high serial clock transition
a. internal clock (BRGxO)
b. external clock (serial clock input)
a. internal clock (BRGxO)
b. external clock (serial clock input)
a. internal clock (BRGxO)
b. external clock (serial clock input)
a. internal clock (BRGxO)
b. external clock (serial clock input)
Non-Multiplexed Serial Interface signals.
2
C input hold time after low-to-high clock transition
Figure 2-10. Host DMA Read Timing Diagram
HWR,HDS,
HD[0–15]
(Output)
HACKor
(Output)
Table 2-17. CPM Input Characteristics
HREQ
(Input)
HRD
Characteristic
MSC8101 Technical Data
49
64
50
RX[0–3]
Read
42
1
1
Valid
Data
43
1
1
63
52
51
Typical
10
20
20
20
10
5
0
3
5
0
5
3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns