MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 12

• Manufacturer Part Number: MSC8101DS
• Description: MSC8101 Network Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

1.3
1-6
DBREQ
EE0
HPE
EE1
EE2
EE3
Signal Name
1
1
1
1
Reset, Configuration, and EOnCE Event Signals
Output
Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
Table 1-4. Reset, Configuration, and EOnCE Event Signals
Debug Request
Determines whether to go into SC140 Debug mode when PORESET is deasserted.
Enhanced OnCE (EOnCE) Event 0
After PORESET is deasserted, you can configure EE0 as an input (default) or an
output.
Debug request, enable Address Event Detection Channel 0, or generate one of the
EOnCE events.
Detection by Address Event Detection Channel 0. Used to trigger external debugging
equipment.
Host Port Enable
When this pin is asserted during PORESET, the Host port is enabled, the PowerPC
data bus is 32 bits wide, and the Host must program the reset configuration word.
EOnCE Event 1
After PORESET is deasserted, you can configure EE1 as an input (default) or an
output.
Enable Address Event Detection Channel 1 or generate one of the EOnCE events.
Debug Acknowledge or detection by Address Event Detection Channel 1. Used to
trigger external debugging equipment.
EOnCE Event 2
After PORESET is deasserted, you can configure EE2 as an input (default) or an
output.
Enable Address Event Detection Channel 2 or generate one of the EOnCE events or
enable the Event Counter.
Detection by Address Event Detection Channel 2. Used to trigger external debugging
equipment.
EOnCE Event 3
After PORESET is deasserted, you can configure EE3 as an input (default) or an
output. See the Emulation and Debug chapter in the SC140 DSP Core Reference
Manual for details on the ERCV Register.
Enable Address Event Detection Channel 3 or generate one of the EOnCE events.
EOnCE Receive Register (ERCV) was read by the DSP. Used to trigger external
debugging equipment.
MSC8101 Technical Data
Signal Description