MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 67

• Manufacturer Part Number: MSC8101DS
• Description: MSC8101 Network Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

Output (I/O)
Directly after the deassertion of
configuration slave, the MSC8101 starts the configuration process. The MSC8101 asserts
SRESET
cycles, after which
Next, the MSC8101 halts until the SPLL locks. The SPLL locks according to
sampled, and to MODCK_H taken from the Reset Configuration Word. SPLL locking time is 800 reference
clocks, which is the clock at the output of the SPLL Pre-divider. After the SPLL is locked, all the clocks to the
MSC8101 are enabled. If the DLLDIS bit in the reset configuration word is reset, the DLL starts the locking
process after the SPLL is locked. During PLL and DLL locking,
remains asserted for another 512 BUS clocks and is then released. The
later. If the DLLDIS bit in the reset configuration word is set, the DLL is bypassed and there is no locking
process, thus saving the DLL locking time. Figure 2-3 shows the power-on reset flow.
Output (I/O)
PORESET
PORESET
HRESET
SRESET
Internal
Input
throughout the power-on reset process, including configuration. Configuration takes 1,024
asserted for
CLKIN.
min 16
1
MODCK[1–3]
Any time
RSTCONF, HPE
HRM, BTM
pins are sampled
Reset Configuration
PORESET
Figure 2-2. Host Reset Configuration Timing
are sampled to determine the MSC8101’s working mode.
Host programs
2
Word
MSC8101 Technical Data
and choice of the reset operation mode as configuration master or
PLL locked
PLL locks after
800 reference clocks
(CLKIN/PDF) and DLL
locks 3073 BUS clocks
after PLL is locked.
When DLL is disabled,
reset period is shortened
by DLL lock time.
MODCK[1–3] pins
are sampled.
MODCK_H bits
are ready for PLL.
3
HRESET
DLL locked
4
SRESET
and
MODCK[1–3]
SRESET
HRESET /SRESET are
extended for 512/515 BUS
clocks, respectively, from
PLL and DLL lock
is released three bus clocks
are asserted.
6
5
HRESET
, which are
Reset Timing
CLOCKIN
and
HRESET
2-13