ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 63
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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WINDOW WATCHDOG (Cont’d)
Figure 36. Exact Timeout Duration (t
WHERE:
t
t
t
CNT = Value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits
in the MCCSR register
To calculate the minimum Watchdog Timeout (t
IF
To calculate the maximum Watchdog Timeout (t
IF
Note: In the above formulae, division results must be rounded down to the next integer value.
Example:
With 2ms timeout selected in MCCSR register
min0
max0
OSC2
(MCCSR Reg.)
WDGCR Register (Hex.)
Value of T[5:0] Bits in
CNT
CNT
TB1 Bit
= (LSB + 128) x 64 x t
= 16384 x t
= 125ns if f
0
0
1
1
<
≤
MSB
-------------
MSB
-------------
00
3F
4
4
(MCCSR Reg.)
OSC2
OSC2
TB0 Bit
THEN
ELSE
THEN
ELSE
0
1
0
1
= 8 MHz
t
t
max
Min. Watchdog
min
t
t
Timeout (ms)
max
OSC2
min
=
=
1.496
t
Selected MCCSR
128
=
=
min
t
t
min0
max0
t
t
min0
max0
Timebase
10ms
25ms
2ms
4ms
min
+
+
+
+
16384
and t
16384
16384
16384
Max. Watchdog
Timeout (ms)
max
×
128.552
×
×
×
2.048
t
⎛
⎝
max
⎛
⎝
CNT
MSB
CNT
CNT
)
min
CNT
max
20
49
4
8
):
–
):
–
×
×
4CNT
---------------- -
MSB
4CNT
---------------- -
LSB
t
MSB
osc2
t
59
53
35
54
osc2
⎞
⎠
⎞
⎠
+
+
(
(
192
192
+
+
LSB
LSB
ST7MC1xx/ST7MC2xx
)
)
×
×
64
64
×
×
4CNT
---------------- -
MSB
4CNT
---------------- -
MSB
×
×
63/309
t
osc2
t
osc2
1
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