ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 199
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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MOTOR CONTROLLER (Cont’d)
10.6.9.4 Programmable Chopper
Depending on the application hardware (use of a
pulse transformer, for example), a chopper may be
needed for the PWM signal. The MREF register al-
lows the chopping frequency and mode to be pro-
grammed.
The HFE[1:0] bits program the channels on which
chopping is to be applied. The chopped PWM sig-
nal may be needed for high side switches only, low
side switches or both of them in the same time
(see
Table 54. Chopping mode
The chopping frequency can any of the 8 values
from 100KHz to 2MHz selected by the HFRQ[2:0]
bits in the MREF register (see
Figure 116. Complementary PWM signals with chopping frequency on high and low side drivers
HFE[1:0] bits
HFE1
Input signal
Reference
Output A
Output B
0
0
1
1
Table
HFE0
0
1
0
1
54).
High channels only
Both Low and High
Low channels only
PCN bit =0
channels
OFF
Chopping mode
Table
High side switches
Low side switches
Both high and low
MCO1, 3, 5
MCO0, 2, 4
PCN bit =1
55).
sides
OFF
Delay
Table 55. Chopping frequency
Note: When the PCN bit = 0:
– If complementary PWM signals are not applied
– If complementary PWM signals are applied (DTE
HFRQ2 HFRQ1 HFRQ0
(DTE bit = 0), the high and low drivers are fixed
by the MPAR register.
and
are taken into account depending on the PWM
application.
bit = 1), the channels are paired as explained in
“Dead Time Generator” on page
means that the high and low channels are fixed
and the HFE[1:0] bits indicate where to apply the
chopper.
tary PWM signals with high frequency chopping
enabled on both high and low drivers.
0
0
0
0
1
1
1
1
Figure 115
Figure 116
0
0
1
1
0
0
1
1
indicate where the HFE[1:0] bits
0
1
0
1
0
1
0
1
Delay
shows typical complemen-
ST7MC1xx/ST7MC2xx
F
Figure
F
mtc
frequency
Chopping
mtc
1.33 MHz
100 KHz
200 KHz
400 KHz
500 KHz
800 KHz
1 MHz
2 MHz
= 16MHz
= 8MHz
108,
194. This
Figure 114
F
666.66 MHz
frequency
Chopping
mtc
100 KHz
200 KHz
250 KHz
400 KHz
500 KHz
50 KHz
1 MHz
= 4MHz
199/309
5V
0V
5V
0V
5V
0V
1
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