ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 94

• Manufacturer Part Number: ST7LITE49M
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49M

• 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10k write/erase cycles guaranteed Data retention
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
• A/d Converter: 10 input channels

On-chip peripherals
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Bits 11:0 = CNTR1[11:0] Counter value
Autoreload register (ATR1H)
Reset value: 0000 0000 (00h)
Autoreload register (ATR1L)
Reset value: 0000 0000 (00h)
Bits 11:0 = ATR1[11:0] Autoreload register 1:
This is a 12-bit register which is written by software. The ATR1 register value is
automatically loaded into the upcounter CNTR1 when an overflow occurs. The register
value is used to set the PWM frequency.
PWM output control register (PWMCR)
Reset value: 0000 0000 (00h)
Bits 7:0 = OE[3:0] PWMx output enable bits
ATR7
15
This 12-bit register is read by software and cleared by hardware after a reset. The
counter CNTR1 increments continuously as soon as a counter clock is selected. To
obtain the 12-bit value, software should read the counter value in two consecutive read
operations. As there is no latch, it is recommended to read LSB first. In this case,
CNTR1H can be incremented between the two read operations and to have an
accurate result when f
close to FFh are read.
When a counter overflow occurs, the counter restarts from the value specified in the
ATR1 register.
These bits are set and cleared by software and cleared by hardware after a reset.
0: PWM mode disabled. PWMx output alternate function disabled (I/O pin free for
general purpose I/O)
1: PWM mode enabled
0
7
0
7
ATR6
OE3
0
ATR5
timer
0
0
Doc ID 13562 Rev 3
=f
CPU
, special care must be taken when CNTR1L values
ATR4
OE2
0
Read/write
Read/write
Read/write
ATR11
ATR3
0
ATR10
ATR2
OE1
ATR9
ATR1
0
ST7LITE49M
ATR0
ATR8
OE0
0
0
8