ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 132

• Manufacturer Part Number: ST7LITE49M
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49M

• 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10k write/erase cycles guaranteed Data retention
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
• A/d Converter: 10 input channels

Instruction set
12.1.2
12.1.3
12.1.4
132/188
Table 52.
Immediate mode
Immediate instructions have 2 bytes, the first byte contains the opcode, the second byte
contains the operand value.
Table 53.
Direct modes
In Direct instructions, the operands are referenced by their memory address.
The direct addressing mode consists of two submodes:
Direct (short) addressing mode
The address is a byte, thus requires only 1 byte after the opcode, but only allows 00 - FF
addressing space.
Direct (long) addressing mode
The address is a word, thus allowing 64 Kbyte addressing space, but requires 2 bytes after
the opcode.
Indexed modes (no offset, short, long)
In this mode, the operand is referenced by its memory address, which is defined by the
unsigned addition of an index register (X or Y) with an offset.
The indirect addressing mode consists of three submodes:
Indexed mode (no offset)
There is no offset (no extra byte after the opcode), and allows 00 - FF addressing space.
Indexed mode (short)
The offset is a byte, thus requires only 1 byte after the opcode and allows 00 - 1FE
addressing space.
Imm
SLL, SRL, SRA, RLC, RRC
Immediate instruction
ADC, ADD, SUB, SBC
Instructions supporting inherent addressing mode (continued)
Instructions supporting inherent immediate addressing mode
AND, OR, XOR
Instruction
BCP
SWAP
CP
LD
MUL
Doc ID 13562 Rev 3
Shift and rotate operations
Arithmetic operations
Logical operations
Byte multiplication
Bit compare
Swap nibbles
Function
Compare
Function
Load
ST7LITE49M