ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 64

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ST7LITE49M

Manufacturer Part Number
ST7LITE49M
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE49M

4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10k write/erase cycles guaranteed Data retention
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
A/d Converter
10 input channels

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Power saving modes
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As soon as Halt mode is entered, and if the AWUEN bit has been set in the AWUCSR
register, the AWU RC oscillator provides a clock signal (f
a fixed divider and a programmable prescaler controlled by the AWUPR register. The output
of this prescaler provides the delay time. When the delay has elapsed, the following actions
are performed:
After this start-up delay, the CPU resumes operation by servicing the AWUFH interrupt. The
AWU flag and its associated interrupt are cleared by software reading the AWUCSR
register.
To compensate for any frequency dispersion of the AWU RC oscillator, it can be calibrated
by measuring the clock frequency f
Measurement mode is enabled by setting the AWUM bit in the AWUCSR register in Run
mode. This connects f
f
Similarities with Halt mode
The following AWUFH mode behavior is the same as normal Halt mode:
Figure 32. AWUF Halt timing diagram
AWU_RC
AWUFH interrupt
f
f
AWU_RC
CPU
the AWUF flag is set by hardware,
an interrupt wakes up the MCU from Halt mode,
the main oscillator is immediately turned on and the 256 CPU cycle delay is used to
stabilize it.
The MCU can exit AWUFH mode by means of any interrupt with exit from Halt
capability or a reset (see
When entering AWUFH mode, the I bit in the CC register is forced to 0 to enable
interrupts. Therefore, if an interrupt is pending, the MCU wakes up immediately.
In AWUFH mode, the main oscillator is turned off causing all internal processing to be
stopped, including the operation of the on-chip peripherals. None of the peripherals are
clocked except those which get their clock supply from another clock generator (such
as an external or auxiliary oscillator like the AWU oscillator).
The compatibility of watchdog operation with AWUFH mode is configured by the
WDGHALT option bit in the option byte. Depending on this setting, the HALT instruction
when executed while the watchdog system is enabled, can generate a watchdog reset.
to be measured using the main oscillator clock as a reference timebase.
RUN MODE
AWU_RC
Section 9.4: Active-halt and Halt
to the input capture of the 8-bit Lite timer, allowing the
Doc ID 13562 Rev 3
HALT MODE
AWU_RC
t
AWU
and then calculating the right prescaler value.
256 t
AWU_RC
CPU
modes).
). Its frequency is divided by
RUN MODE
ST7LITE49M
Clear
by software

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