ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 157

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ST7LITE49M

Manufacturer Part Number
ST7LITE49M
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE49M

4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10k write/erase cycles guaranteed Data retention
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
A/d Converter
10 input channels

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13.8.2
13.8.3
EMI (electromagnetic interference)
Based on a simple application running on the product (toggling two LEDs through the I/O
ports), the product is monitored in terms of emission. This emission test is in line with the
norm SAE J 1752/3 which specifies the board and the loading of each pin.
Table 80.
Absolute maximum ratings (electrical sensitivity)
Based on two different tests (ESD and LU) using specific measurement methods, the
product is stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts*(n+1) supply pin). Two models
can be simulated: Human body model and Machine model. This test conforms to the
JESD22-A114A/A115A standard. For more details, refer to the application note AN1181.
Table 81.
1. Data based on characterization results, not tested in production.
Static latch-up (LU)
Two complementary static tests are required on six parts to assess the latch-up
performance.
These tests are compliant with the EIA/JESD 78 IC latch-up standard.
V
Symbol
V
Symbol
ESD(HBM)
ESD(CDM)
S
EMI
A supply overvoltage is applied to each power supply pin
A current injection is applied to each input, output and configurable I/O pin.
Parameter
Peak level
EMI emissions
ESD absolute maximum ratings
Electrostatic discharge voltage (Charge device
Electrostatic discharge voltage (Human body
V
DD
conforming to SAE
=5 V, T
Conditions
J 1752/3
Doc ID 13562 Rev 3
Ratings
model)
model)
A
= +25 °C,
30 MHz to 130 MHz
0.1 MHz to 30 MHz
130 MHz to 1 GHz
frequency band
SAE EMI Level
Monitored
Conditions
T
T
A
A
=+25 °C
=+25 °C
Electrical characteristics
8/4MHz 16/8MHz
28
31
18
3
[f
Max vs.
OSC
Maximum
/f
value
CPU
4000
500
3.5
32
34
26
]
(1)
157/188
dBμV
Unit
Unit
-
V

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