ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 177

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
15.9.3
Figure 81. SCI block diagram in LIN slave mode
LIN reception
In LIN mode the reception of a byte is the same as in SCI mode but the LINSCI has features
for handling the LIN header automatically (identifier detection) or semiautomatically (synch
break detection) depending on the LIN Header detection mode. The detection mode is
selected by the LHDM bit in the SCICR3.
Additionally, an automatic resynchronization feature can be activated to compensate for any
clock deviation, for more details please refer to
LIN header handling by a slave
Depending on the LIN header detection method the LINSCI will signal the detection of a LIN
Header after the LIN synch break or after the Identifier has been successfully received.
TDO
RDI
SCIBRR
TIE
LIN SLAVE BAUD RATE GENERATOR
SCICR2
LPR7
f
CPU
f
CPU
INTERRUPT
AUTO SYNCHRONIZATION
LIN SLAVE BAUD RATE
TCIE
CONTROL
Transmit Data Register (TDR)
SCI
TRANSMIT
CONTROL
RIE
LINSCI serial communication interface (LIN master/slave)
Doc ID 12370 Rev 8
Transmit Shift Register
/ LDIV
Write
UNIT
ILIE
TE
RE
LPR0
/16
RWU
WAKE
UNIT
UP
R8
SBK
CONVENTIONAL BAUD RATE
EXTENDED PRESCALER
T8 SCID M
LIN baud
Received Data Register (RDR)
LDUM
GENERATOR
Read
Receive Shift Register
TDRE TC RDRF IDLE
+
LINE
WAKE
RECEIVER
CONTROL
LSLV
rate.
(DATA REGISTER) SCIDR
PCE
LASE
SCICR1
PS PIE
LHDM
OR/
LHE
0
1
TRANSMITTER
LHIE
RECEIVER
NF
CLOCK
CLOCK
LHDF
FE
SCICR3
SCISR
LSF
PE
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