ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 98
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ST7232AK2-Auto
Manufacturer Part Number
ST7232AK2-Auto
Description
8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet
1.ST7232AK2-AUTO.pdf
(201 pages)
Specifications of ST7232AK2-Auto
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
halt, active halt, wait and slow
Main Clock Controller With
real time base, beep and clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
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On-chip peripherals
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Table 36.
Control/status register (CSR)
Table 37.
CSR
ICF1
Bit
Bit
R
7
1
0
7
6
5
4
CR2 register description (continued)
CSR register description
OCF1
Bit name
Bit name
EXEDG
IEDG2
R
6
OCF1
ICF1
ICF2
TOF
TOF
Input edge 2
External clock edge
Input capture flag 1
Output compare flag 1
Timer overflow flag
Input capture flag 2
R
5
This bit determines which type of level transition on the ICAP2 pin
triggers the capture.
0: A falling edge triggers the capture
1: A rising edge triggers the capture
This bit determines which type of level transition on the external
clock pin EXTCLK triggers the counter register.
0: A falling edge triggers the counter register
1: A rising edge triggers the counter register
0: No input capture (reset value)
1: An input capture has occurred on the ICAP1 pin or the counter
has reached the OC2R value in PWM mode. To clear this bit, first
read the SR register, then read or write the low byte of the IC1R
(IC1LR) register.
0: No match (reset value)
1: The content of the free running counter has matched the content
of the OC1R register. To clear this bit, first read the SR register, then
read or write the low byte of the OC1R (OC1LR) register.
0: No timer overflow (reset value)
1: The free running counter rolled over from FFFFh to 0000h. To
clear this bit, first read the SR register, then read or write the low
byte of the CR (CLR) register.
Note: Reading or writing the ACLR register does not clear TOF
0: No input capture (reset value)
1: An input capture has occurred on the ICAP2 pin. To clear this bit,
first read the SR register, then read or write the low byte of the IC2R
(IC2LR) register.
ICF2
R
4
OCF2
R
3
Function
Function
TIMD
R/W
2
Reset value: xxxx x0xx (xxh)
ST7232Axx-Auto
1
Reserved
-
0
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