ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 108
ST7232AK2-Auto
Manufacturer Part Number
ST7232AK2-Auto
Description
8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet
1.ST7232AK2-AUTO.pdf
(201 pages)
Specifications of ST7232AK2-Auto
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
halt, active halt, wait and slow
Main Clock Controller With
real time base, beep and clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
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On-chip peripherals
10.4.4
Note:
Note:
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Clock phase and clock polarity
The SPIF bit can be cleared during a second transmission; however, it must be cleared
before the second SPIF bit in order to prevent an overrun condition (see
(OVR) on page
Four possible timing relationships may be chosen by software, using the CPOL and CPHA
bits (see
The idle state of SCK must correspond to the polarity selected in the SPICSR register (by
pulling up SCK if CPOL = 1 or pulling down SCK if CPOL = 0).
The combination of the CPOL clock polarity and CPHA (clock phase) bits selects the data
capture clock edge
Figure
The diagram may be interpreted as a master or slave timing diagram where the SCK pin, the
MISO pin, the MOSI pin are directly connected between the master and the slave device.
If CPOL is changed at the communication byte boundaries, the SPI must be disabled by
resetting the SPE bit.
50, shows an SPI transfer with the four combinations of the CPHA and CPOL bits.
Figure
110).
50).
Overrun condition
ST7232Axx-Auto
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