ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 73

• Manufacturer Part Number: ST7232AK2-Auto
• Description: 8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMicroelectronics

Specifications of ST7232AK2-Auto

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and bypass for external clock
• Four Power Saving Modes: halt, active halt, wait and slow
• Main Clock Controller With: real time base, beep and clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST7232Axx-Auto
10.1.9
10.1.10
10.2
10.2.1
Control register (WDGCR)
Table 25.
1. The WDGA bit is not used if the hardware watchdog option is enabled by option byte.
Watchdog timer register map and reset values
Table 26.
Main clock controller with real-time clock and beeper
(MCC/RTC)
The main clock controller consists of three different functions:
●
●
●
Each function can be used independently and simultaneously.
Programmable CPU clock prescaler
The programmable CPU clock prescaler supplies the clock for the ST7 CPU and its internal
peripherals. It manages slow power saving mode (see
details).
The prescaler selects the f
MCCSR register: CP[1:0] and SMS.
WDGCR
002Ah
Address(Hex.)
WDGA
R/W
6:0
Bit
A programmable CPU clock prescaler
A clock-out signal to supply external devices
A real-time clock timer with interrupt capability
7
7
WDGCR register description
Watchdog timer register map and reset values
Bit name
WDGA
6
T[6:0]
WDGCR
Reset value
Register label
CPU
Activation bit
7-bit counter (MSB to LSB)
5
This bit is set by software and only cleared by hardware after a reset.
When WDGA = 1, the watchdog can generate a reset.
0: Watchdog disabled
1: Watchdog enabled
These bits contain the value of the watchdog counter. They are
decremented every 16384 f
produced when it rolls over from 40h to 3Fh (T6 becomes cleared).
main clock frequency and is controlled by three bits in the
WDGA
7
0
(1)
4
T6
6
1
T[6:0]
R/W
T5
3
5
1
OSC2
Section 8.2: Slow mode
Function
T4
4
1
cycles (approx.). A reset is
2
Reset value: 0111 1111 (7Fh)
T3
3
1
On-chip peripherals
T2
2
1
1
for more
T1
1
1
0
73/201
T0
0
1