ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 135

• Manufacturer Part Number: ST7232AK2-Auto
• Description: 8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMicroelectronics

Specifications of ST7232AK2-Auto

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and bypass for external clock
• Four Power Saving Modes: halt, active halt, wait and slow
• Main Clock Controller With: real time base, beep and clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST7232Axx-Auto
Table 49.
Data register (SCIDR)
Contains the received or transmitted data character, depending on whether it is read from or
written to.
The data register performs a double function (read and write) since it is composed of two
registers, one for transmission (TDR) and one for reception (RDR).
The TDR register provides the parallel interface between the internal bus and the output
shift register (see
The RDR register provides the parallel interface between the input shift register and the
internal bus (see
SCIDR
Bit
7
3
2
1
0
SCICR2 register description (continued)
Bit name
6
RWU
SBK
Figure
RE
Figure
TE
53).
53).
Transmitter enable
Receiver enable
Receiver wake up
Send break
5
This bit enables the transmitter. It is set and cleared by software.
0: Transmitter is disabled
1: Transmitter is enabled
Note 1: During transmission, an ‘0’ pulse on the TE bit (‘0’ followed
by ‘1’) sends a preamble (idle line) after the current word.
Note 2: When TE is set there is a 1 bit-time delay before the
transmission starts.
Caution The TDO pin is free for general purpose I/O only when the
TE and RE bits are both cleared (or if TE is never set).
This bit enables the receiver. It is set and cleared by software.
0: Receiver is disabled
1: Receiver is enabled and begins searching for a start bit
This bit determines if the SCI is in mute mode or not. It is set and
cleared by software and can be cleared by hardware when a wake
up sequence is recognized.
0: Receiver in active mode
1: Receiver in mute mode
Note: Before selecting mute mode (setting the RWU bit), the SCI
must receive some data first, otherwise it cannot function in mute
mode with wakeup by idle line detection.
This bit set is used to send break characters. It is set and cleared by
software.
0: No break character is transmitted
1: Break characters are transmitted
Note: If the SBK bit is set to ‘1’ and then to ‘0’, the transmitter sends
a BREAK word at the end of the current word.
4
DR[7:0]
R/W
3
Function
2
On-chip peripherals
Reset value: undefined
1
135/201
0