SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 640

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

38.6.1.4
38.6.1.5
38.6.2
38.6.2.1
38.6.2.2
642
642
SAM9G10
SAM9G10
LCD Controller Core
Channel-L
Control
Configuration Block
Datapath
This block has the same functionality as Channel-U, but for the Lower Panel in dual scan mode
only.
This block receives the request signals from the LCDC core and generates the requests for the
channels.
The configuration block is a set of programmable registers that are used to configure the LCDC
core operation. These registers are written via the AHB slave interface. Only word access is
allowed.
The description of the configuration registers can be found in
Interface” on page
The datapath block contains five submodules: FIFO, Serializer, Palette, Dithering and Shifter.
The structure of the datapath is shown in
665.
Figure
38-2.
“LCD Controller (LCDC) User
6462B–ATARM–6-Sep-11
6462B–ATARM–6-Sep-11