SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 2

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
2
Advanced Interrupt Controller (AIC)
Debug Unit (DBGU)
Periodic Interval Timer (PIT)
Watchdog Timer (WDT)
Real-Time Timer (RTT)
Three 32-bit Parallel Input/Output Controllers (PIO) PIOA, PIOB and PIOC
Nineteen Peripheral DMA (PDC) Channels
Multimedia Card Interface (MCI)
Three Synchronous Serial Controllers (SSC)
Three Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Two Master/Slave Serial Peripheral Interface (SPI)
One Three-channel 16-bit Timer/Counters (TC)
Two-wire Interface (TWI)
IEEE
Required Power Supplies:
Available in a 217-ball LFBGA RoHS-compliant Package
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
– 2-wire USART and support for Debug Communication Channel, Programmable ICE Access Prevention
– Mode for General Purpose Two-wire UART Serial Communication
– 20-bit Interval Timer plus 12-bit Interval Counter
– Key Protected, Programmable Only Once, Windowed 12-bit Counter, Running at Slow Clock
– 32-bit Free-running Backup Counter Running at Slow Clock
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– Schmitt Trigger on All Inputs
– SDCard/SDIO and MultiMediaCard
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC, MMC and SDCard Compliant
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
– Individual Baud Rate Generator, IrDA
– Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking, RS485 Support
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Three External Clock Inputs, Two multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
– Master Mode Support, All Two-wire Atmel EEPROMs Supported
– Compatibility with Standard Two-wire Serial Memories
– One, Two or Three Bytes for Slave Address
– Sequential Read/Write Operations
– Master, Multi-master and Slave Mode Operation
– Bit rate: up to 400 Kbits
– GEneral Call Supported in Slave Mode
– 1.08V to 1.32V for VDDCORE and VDDBU
– 3.0V to 3.6V for VDDOSC and for VDDPLL
– 2.7V to 3.6V for VDDIOP (Peripheral I/Os)
– 1.65V to 3.6V for VDDIOM (Memory I/Os)
®
1149.1 JTAG Boundary Scan on All Digital Pins
SAM9G10
Compliant
®
Infrared Modulation/Demodulation
6462B–ATARM–6-Sep-11

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