SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 11

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
5. Power Considerations
5.1
6. I/O Line Considerations
6.1
6.2
6.3
6462B–ATARM–6-Sep-11
Power Supplies
JTAG Port Pins
Test Pin
Reset Pin
The SAM9G10 has six types of power supply pins:
The double power supplies VDDIOM and VDDIOP are identified in
supplies enable the user to power the device differently for interfacing with memories and for
interfacing with peripherals.
Ground pins GND are common to VDDCORE, VDDIOM and VDDIOP pins power supplies. Sep-
arated ground pins are provided for VDDBU, VDDOSC and VDDPLL. The ground pins are
GNDBU, GNDOSC and GNDPLL, respectively.
TMS, TDI and TCK are Schmitt trigger inputs and have no pull-up resistors.
TDO and RTCK are outputs, driven at up to VDDIOP, and have no pull-up resistor.
The JTAGSEL pin is used to select the JTAG boundary scan when asserted at a high level (tied
to VDDBU). It integrates a permanent pull-down resistor of about 15 kΩ to GNDBU, so that it can
be left unconnected for normal operations.
The NTRST pin is used to initialize the embedded ICE TAP Controller when asserted at a low
level. It integrates a permanent pull-up resistor of about 15 kΩ to VDDIOP, so that it can be left
unconnected for normal operations.
The TST pin is used for manufacturing test purposes when asserted high. It integrates a perma-
nent pull-down resistor of about 15 kΩ to GNDBU, so that it can be left unconnected for normal
operations. Driving this line at a high level leads to unpredictable results.
NRST is an open-drain output integrating a non-programmable pull-up resistor. It can be driven
with voltage at up to VDDIOP. As the product integrates power-on reset cells, the NRST pin can
be left unconnected in case no reset from the system needs to be applied to the product.
• VDDCORE pins: Power the core, including the processor, the memories and the peripherals;
• VDDIOM pins: Power the External Bus Interface I/O lines; voltage ranges from 1.65V to
• VDDIOP pins: Power the Peripheral I/O lines and the USB transceivers; voltage ranges from
• VDDBU pin: Powers the Slow Clock oscillator and a part of the System Controller; voltage
• VDDPLL pin: Powers the PLL cells; voltage ranges from 3.0V and 3.6V, 3.3V nominal.
• VDDOSC pin: Powers the Main Oscillator cells; voltage ranges from 3.0V and 3.6V, 3.3V
voltage ranges from 1.08V and 1.32V, 1.2V nominal.
1.95V and 3.0V to 3.6V, 1.8V and 3.3V nominal.
2.7V and 3.6V, 3.3V nominal.
ranges from 1.08V and 1.32V, 1.2V nominal.
nominal.
Table 4-1 on page
SAM9G10
10. These
11

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