SAM3U4E Atmel Corporation, SAM3U4E Datasheet - Page 855
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SAM3U4E
Manufacturer Part Number
SAM3U4E
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U4E
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
50
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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The NOTBUSY flag allows to deal with these different states.
0 = The HSMCI is not ready for new data transfer. Cleared at the end of the card response.
1 = The HSMCI is ready for new data transfer. Set when the busy state on the data line has ended. This corresponds to a
free internal data receive buffer of the card.
Refer to the MMC or SD Specification for more details concerning the busy behavior.
For all the read operations, the NOTBUSY flag is cleared at the end of the host command.
For the Infinite Read Multiple Blocks, the NOTBUSY flag is set at the end of the STOP_TRANSMISSION host command
(CMD12).
For the Single Block Reads, the NOTBUSY flag is set at the end of the data read block.
For the Multiple Block Reads with pre-defined block count, the NOTBUSY flag is set at the end of the last received data
block.
• SDIOIRQA: SDIO Interrupt for Slot A
0 = No interrupt detected on SDIO Slot A.
1 = An SDIO Interrupt on Slot A occurred. Cleared when reading the HSMCI_SR.
• SDIOWAIT: SDIO Read Wait Operation Status
0 = Normal Bus operation.
1 = The data bus has entered IO wait state.
• CSRCV: CE-ATA Completion Signal Received
0 = No completion signal received since last status read operation.
1 = The device has issued a command completion signal on the command line. Cleared by reading in the HSMCI_SR
register.
• RINDE: Response Index Error
0 = No error.
1 = A mismatch is detected between the command index sent and the response index received. Cleared when writing in
the HSMCI_CMDR.
• RDIRE: Response Direction Error
0 = No error.
1 = The direction bit from card to host in the response has not been detected.
• RCRCE: Response CRC Error
0 = No error.
1 = A CRC7 error has been detected in the response. Cleared when writing in the HSMCI_CMDR.
• RENDE: Response End Bit Error
0 = No error.
1 = The end bit of the response has not been detected. Cleared when writing in the HSMCI_CMDR.
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
SAM3U Series
SAM3U Series
855
855
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